1. Field of the Invention
The present invention relates to a class AB CMOS output circuit equipped with a CMOS circuit, and in particular, a class AB CMOS output circuit including a CMOS circuit which is formed on a semiconductor substrate and operates by a predetermined operating current.
2. Description of the Related Art
As an output circuit of a CMOS operational amplifier circuit, there have been known a source follower circuit and a class A output circuit. These circuits have such a problem as a narrow output dynamic range and increase in power consumption due to a relatively large stationary current. Therefore, a class AB output circuit, which can implement a relatively small stationary current and a relatively large output current in a wide output dynamic range, has been widely used currently as an output circuit of the CMOS operational amplifier circuit (for example, See FIG. 16 of a prior art document of Akira Matsuzawa, “CMOS Operational Amplifier”, The IEICE Transactions on Electronics (Electronics Society), published by the Institute of Electronics, Information and Communication Engineers (IEICE) in Japan, Vol. J84-C, No. 5, pp. 357-373, May 2001 (referred to as a prior art document hereinafter).
In a paragraph “3.5 Output Buffer” of the prior art document, the following is disclosed. FIG. 16 of the prior art document is shown in FIG. 3 of the present application.
In order to drive a resistance load, it is necessary to provide a buffer circuit that buffers a high-impedance voltage. A simplest voltage buffer is a source-follower circuit. However, the source follower circuit has the following problems. A voltage shift of Vgs is caused in the source follower circuit, and an output dynamic range is narrowed. Then it is difficult to use the same as a relatively low voltage circuit of about three volts, which has been recently considered as a standard. Further, a relatively large stationary current flows in the circuit to increase power consumption. For these reasons, a class AB buffer circuit having a relatively small stationary current and that can obtain substantially full-scale output voltage has been widely used instead.
FIG. 3 shows a class AB buffer circuit using common gate level shift. As shown in FIG. 3, it is considered to be easily understood that, in bias conditions in which a current 2Ib flows in a transistor M5 when a W/L ratio of each transistor is set, the voltages are set to satisfy V2=V3 and V1=V4 and a bias current IO flows in transistors M1 and M2. Next, when a voltage Vin falls from the voltage of this bias state, the current flowing in the transistor M5 increases, and the voltages V1 and V2 rise. Accordingly, the transistor M4 is turned off, all the currents flows in a transistor M3, the voltage V1 rises so as to close to the voltage Vdd, the transistor M1 is turned off, a gate voltage of the transistor M2 rises so as to close to the voltage Vdd, and a leading-in current of the transistor M2 suddenly rises. Conversely, when the voltage Vin rises from the voltage of the bias state, the transistors M3 and M2 are turned off, the voltage V1 falls to a voltage near a ground voltage, and a current of the transistor M1 suddenly rises. As can be seen from above, the class AB buffer circuit can withdraw a relatively large driving current for operation from the small bias current in the bias state, and also, can obtain a wide output dynamic range from a ground potential to the voltage Vdd. This circuit is employed by, for example, inserting the transistors M3 and M4 into an output-side current path of an amplifier circuit of one stage.
In a relatively low voltage circuit in which the power supply voltage Vdd is, for example, one volt and in which a threshold voltage Vth of a P channel metal oxide semiconductor field effect transistor (referred to as a “MOSFET” hereinafter) or an N channel MOSFET is, for example, 0.5 volts, it is disadvantageously difficult to provide transistors of multiple stages in an operational amplifier circuit. Therefore, there is caused such a problem that it is impossible to implement any bias circuit of the class AB CMOS output circuit according to the prior art shown in FIG. 3.